Field of the Invention
The present invention relates to a semiconductor technique, and more particularly, to a semiconductor device and a method for manufacturing the same.
Description of the Related Art
As generations of integrated circuits (ICs) progress, a constant goal of the semiconductor industry is to improve the driving current of the device so as to enhance the computing efficiency thereof. When the size of devices are scaled to 130 nm or less, in particular to 65 nm or less, it is difficult to utilize conventional means, such as shortening the gate (or channel) length or increasing the capacitance of the gate oxide, to improve the driving current of the device.
According to semiconductor physics, the driving current of the metal oxide semiconductor field effect transistor (MOSFET) is proportional to the gate (or channel) width. In this regard, increasing the gate dimension in the channel width direction is a feasible way to improve the driving current. The increase in the gate dimension in the channel width direction, however, may cause large chip areas be occupied by the gate and adversely impact the scaling down process of the chip.
Therefore, a novel semiconductor device and a method for manufacturing the same are desired to improve the driving current thereof.